mirror of
https://github.com/PaulStoffregen/Tlc5940
synced 2025-06-27 10:27:48 +02:00
77 lines
2.2 KiB
C
77 lines
2.2 KiB
C
#ifndef TLC_Teensy_xxU4_h
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#define TLC_Teensy_xxU4_h
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// bitbang I/O is pretty fast on Teensy 3.1
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// and avoids SPI sharing problems
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#ifdef DATA_TRANSFER_MODE
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#undef DATA_TRANSFER_MODE
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#endif
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#define DATA_TRANSFER_MODE TLC_BITBANG
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// Teensy pin 6 -> SIN (TLC pin 26)
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#define DEFAULT_BB_SIN_PIN 6
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#define DEFAULT_BB_SIN_PORT 6
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#define DEFAULT_BB_SIN_DDR 6
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// Teensy pin 7 -> SCLK (TLC pin 25)
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#define DEFAULT_BB_SCLK_PIN 7
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#define DEFAULT_BB_SCLK_PORT 7
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#define DEFAULT_BB_SCLK_DDR 7
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// FTM1_CH0 (Teensy pin 3) -> XLAT (TLC pin 24)
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#define XLAT_PIN 3
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#define XLAT_PORT 3
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#define XLAT_DDR 3
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// FTM1_CH1 (Teensy pin 4) -> BLANK (TLC pin 23)
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#define BLANK_PIN 4
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#define BLANK_PORT 4
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#define BLANK_DDR 4
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// CMTOUT (Teensy pin 5) -> GSCLK (TLC pin 18)
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#define GSCLK_PIN 5
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#define GSCLK_PORT 5
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#define GSCLK_DDR 5
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// Timer settings...
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#if F_BUS == 60000000
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#define TLC_TIMER_TEENSY3_NORMAL_CGH1 4
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#define TLC_TIMER_TEENSY3_NORMAL_CGL1 11
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#define TLC_TIMER_TEENSY3_NORMAL_MOD 30720
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#define TLC_TIMER_TEENSY3_NORMAL_CV 4
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#elif F_BUS == 56000000
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#define TLC_TIMER_TEENSY3_NORMAL_CGH1 3
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#define TLC_TIMER_TEENSY3_NORMAL_CGL1 11
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#define TLC_TIMER_TEENSY3_NORMAL_MOD 28672
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#define TLC_TIMER_TEENSY3_NORMAL_CV 3
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#elif F_BUS == 48000000
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#define TLC_TIMER_TEENSY3_NORMAL_CGH1 3
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#define TLC_TIMER_TEENSY3_NORMAL_CGL1 9
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#define TLC_TIMER_TEENSY3_NORMAL_MOD 24576
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#define TLC_TIMER_TEENSY3_NORMAL_CV 3
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#elif F_BUS == 36000000
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#define TLC_TIMER_TEENSY3_NORMAL_CGH1 2
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#define TLC_TIMER_TEENSY3_NORMAL_CGL1 7
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#define TLC_TIMER_TEENSY3_NORMAL_MOD 18432
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#define TLC_TIMER_TEENSY3_NORMAL_CV 2
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#elif F_BUS == 24000000
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#define TLC_TIMER_TEENSY3_NORMAL_CGH1 2
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#define TLC_TIMER_TEENSY3_NORMAL_CGL1 4
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#define TLC_TIMER_TEENSY3_NORMAL_MOD 12288
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#define TLC_TIMER_TEENSY3_NORMAL_CV 2
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#elif F_BUS == 16000000
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#define TLC_TIMER_TEENSY3_NORMAL_CGH1 1
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#define TLC_TIMER_TEENSY3_NORMAL_CGL1 3
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#define TLC_TIMER_TEENSY3_NORMAL_MOD 8192
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#define TLC_TIMER_TEENSY3_NORMAL_CV 1
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#elif F_BUS <= 8000000
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#define TLC_TIMER_TEENSY3_NORMAL_CGH1 1
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#define TLC_TIMER_TEENSY3_NORMAL_CGL1 1
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#define TLC_TIMER_TEENSY3_NORMAL_MOD 4096
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#define TLC_TIMER_TEENSY3_NORMAL_CV 1
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#else
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#error "F_BUS must be 60, 56, 48, 36, 24, 16, 8, 4, or 2 MHz"
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#endif
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#endif
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