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Teensy 3.1 port, BLANK & XLAT working

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PaulStoffregen 2014-06-08 13:04:31 -07:00
parent 8e4273385f
commit 03bdbd60bb
4 changed files with 54 additions and 22 deletions
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49
Tlc5940.cpp
View File

@ -65,8 +65,18 @@ static inline void Tlc5940_interrupt(void)
} }
#if defined(__AVR__) #if defined(__AVR__)
ISR(TIMER1_OVF_vect) { Tlc5940_interrupt(); } ISR(TIMER1_OVF_vect)
{
Tlc5940_interrupt();
}
#elif defined(__arm__) && defined(TEENSYDUINO) #elif defined(__arm__) && defined(TEENSYDUINO)
void ftm1_isr(void)
{
uint32_t sc = FTM1_SC;
if (sc & 0x80) FTM1_SC = sc & 0x7F;
Tlc5940_interrupt();
}
#endif #endif
@ -152,24 +162,33 @@ void Tlc5940::init(uint16_t initialValue)
TCCR1B |= _BV(CS10); // no prescale, (start pwm output) TCCR1B |= _BV(CS10); // no prescale, (start pwm output)
#elif defined(__arm__) && defined(TEENSYDUINO) #elif defined(__arm__) && defined(TEENSYDUINO)
SIM_SCGC4 |= SIM_SCGC4_CMT; clear_pin(XLAT_DDR, XLAT_PIN);
CMT_MSC = 0; SIM_SCGC4 |= SIM_SCGC4_CMT;
CMT_PPS = 0; CMT_MSC = 0;
CMT_CGH1 = TLC_TIMER_TEENSY3_NORMAL_CGH1; CMT_PPS = 0;
CMT_CGL1 = TLC_TIMER_TEENSY3_NORMAL_CGL1; CMT_CGH1 = TLC_TIMER_TEENSY3_NORMAL_CGH1;
CMT_CMD1 = 1; CMT_CGL1 = TLC_TIMER_TEENSY3_NORMAL_CGL1;
CMT_CMD2 = 0; CMT_CMD1 = 1;
CMT_CMD3 = 0; CMT_CMD2 = 0;
CMT_CMD4 = 0; CMT_CMD3 = 0;
CMT_OC = 0x60; CMT_CMD4 = 0;
CMT_MSC = 0x01; CMT_OC = 0x60;
CORE_PIN5_CONFIG = PORT_PCR_MUX(2)|PORT_PCR_DSE|PORT_PCR_SRE; CMT_MSC = 0x01;
CORE_PIN5_CONFIG = PORT_PCR_MUX(2)|PORT_PCR_DSE|PORT_PCR_SRE;
FTM1_SC = 0;
FTM1_MOD = TLC_TIMER_TEENSY3_NORMAL_MOD;
FTM1_CNT = 0;
FTM1_C0SC = 0x24;
FTM1_C1SC = 0x24;
FTM1_C0V = TLC_TIMER_TEENSY3_NORMAL_MOD - TLC_TIMER_TEENSY3_NORMAL_CV;
FTM1_C1V = TLC_TIMER_TEENSY3_NORMAL_MOD - TLC_TIMER_TEENSY3_NORMAL_CV - 1;
FTM1_SC = FTM_SC_CLKS(1) | FTM_SC_CPWMS;
NVIC_ENABLE_IRQ(IRQ_FTM1);
CORE_PIN4_CONFIG = PORT_PCR_MUX(3)|PORT_PCR_DSE|PORT_PCR_SRE;
#endif #endif
update(); update();
} }
void cmt_isr(void) { uint8_t tmp = CMT_MSC; tmp = CMT_CMD2; }
/** Clears the grayscale data array, #tlc_GSData, but does not shift in any /** Clears the grayscale data array, #tlc_GSData, but does not shift in any
data. This call should be followed by update() if you are turning off data. This call should be followed by update() if you are turning off
all the outputs. */ all the outputs. */

9
Tlc5940.h
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@ -50,11 +50,10 @@
#define disable_XLAT_pulses() TCCR1A = _BV(COM1B1) #define disable_XLAT_pulses() TCCR1A = _BV(COM1B1)
#elif defined(__arm__) && defined(TEENSYDUINO) #elif defined(__arm__) && defined(TEENSYDUINO)
#define set_XLAT_interrupt() { uint32_t tmp __attribute__((unused)) = FTM1_SC; FTM1_SC = FTM_SC_CLKS(1) | FTM_SC_CPWMS | FTM_SC_TOIE; }
#define set_XLAT_interrupt() #define clear_XLAT_interrupt() FTM1_SC = FTM_SC_CLKS(1) | FTM_SC_CPWMS
#define clear_XLAT_interrupt() #define enable_XLAT_pulses() CORE_PIN3_CONFIG = PORT_PCR_MUX(3)|PORT_PCR_DSE|PORT_PCR_SRE
#define enable_XLAT_pulses() #define disable_XLAT_pulses() CORE_PIN3_CONFIG = PORT_PCR_MUX(1)|PORT_PCR_DSE|PORT_PCR_SRE
#define disable_XLAT_pulses()
#endif #endif

14
pinouts/Teensy_KinetisK20.h
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@ -37,24 +37,38 @@
#if F_BUS == 60000000 #if F_BUS == 60000000
#define TLC_TIMER_TEENSY3_NORMAL_CGH1 4 #define TLC_TIMER_TEENSY3_NORMAL_CGH1 4
#define TLC_TIMER_TEENSY3_NORMAL_CGL1 11 #define TLC_TIMER_TEENSY3_NORMAL_CGL1 11
#define TLC_TIMER_TEENSY3_NORMAL_MOD 30720
#define TLC_TIMER_TEENSY3_NORMAL_CV 4
#elif F_BUS == 56000000 #elif F_BUS == 56000000
#define TLC_TIMER_TEENSY3_NORMAL_CGH1 3 #define TLC_TIMER_TEENSY3_NORMAL_CGH1 3
#define TLC_TIMER_TEENSY3_NORMAL_CGL1 11 #define TLC_TIMER_TEENSY3_NORMAL_CGL1 11
#define TLC_TIMER_TEENSY3_NORMAL_MOD 28672
#define TLC_TIMER_TEENSY3_NORMAL_CV 3
#elif F_BUS == 48000000 #elif F_BUS == 48000000
#define TLC_TIMER_TEENSY3_NORMAL_CGH1 3 #define TLC_TIMER_TEENSY3_NORMAL_CGH1 3
#define TLC_TIMER_TEENSY3_NORMAL_CGL1 9 #define TLC_TIMER_TEENSY3_NORMAL_CGL1 9
#define TLC_TIMER_TEENSY3_NORMAL_MOD 24576
#define TLC_TIMER_TEENSY3_NORMAL_CV 3
#elif F_BUS == 36000000 #elif F_BUS == 36000000
#define TLC_TIMER_TEENSY3_NORMAL_CGH1 2 #define TLC_TIMER_TEENSY3_NORMAL_CGH1 2
#define TLC_TIMER_TEENSY3_NORMAL_CGL1 7 #define TLC_TIMER_TEENSY3_NORMAL_CGL1 7
#define TLC_TIMER_TEENSY3_NORMAL_MOD 18432
#define TLC_TIMER_TEENSY3_NORMAL_CV 2
#elif F_BUS == 24000000 #elif F_BUS == 24000000
#define TLC_TIMER_TEENSY3_NORMAL_CGH1 2 #define TLC_TIMER_TEENSY3_NORMAL_CGH1 2
#define TLC_TIMER_TEENSY3_NORMAL_CGL1 4 #define TLC_TIMER_TEENSY3_NORMAL_CGL1 4
#define TLC_TIMER_TEENSY3_NORMAL_MOD 12288
#define TLC_TIMER_TEENSY3_NORMAL_CV 2
#elif F_BUS == 16000000 #elif F_BUS == 16000000
#define TLC_TIMER_TEENSY3_NORMAL_CGH1 1 #define TLC_TIMER_TEENSY3_NORMAL_CGH1 1
#define TLC_TIMER_TEENSY3_NORMAL_CGL1 3 #define TLC_TIMER_TEENSY3_NORMAL_CGL1 3
#define TLC_TIMER_TEENSY3_NORMAL_MOD 8192
#define TLC_TIMER_TEENSY3_NORMAL_CV 1
#elif F_BUS <= 8000000 #elif F_BUS <= 8000000
#define TLC_TIMER_TEENSY3_NORMAL_CGH1 1 #define TLC_TIMER_TEENSY3_NORMAL_CGH1 1
#define TLC_TIMER_TEENSY3_NORMAL_CGL1 1 #define TLC_TIMER_TEENSY3_NORMAL_CGL1 1
#define TLC_TIMER_TEENSY3_NORMAL_MOD 4096
#define TLC_TIMER_TEENSY3_NORMAL_CV 1
#else #else
#error "F_BUS must be 60, 56, 48, 36, 24, 16, 8, 4, or 2 MHz" #error "F_BUS must be 60, 56, 48, 36, 24, 16, 8, 4, or 2 MHz"
#endif #endif

4
pinouts/pin_functions.h
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@ -8,13 +8,13 @@
#define output_pin(ddr, pin) ddr |= _BV(pin) #define output_pin(ddr, pin) ddr |= _BV(pin)
#define pullup_pin(ddr, port, pin) ddr &= ~_BV(pin); port |= _BV(pin) #define pullup_pin(ddr, port, pin) ddr &= ~_BV(pin); port |= _BV(pin)
#elif defined(TEENSYDUINO) #elif defined(TEENSYDUINO)
#define pulse_pin(port, pin) digitalWriteFast(pin, LOW); digitalWriteFast(pin, HIGH) #define pulse_pin(port, pin) digitalWriteFast(pin, HIGH); digitalWriteFast(pin, LOW)
#define set_pin(port, pin) digitalWriteFast(pin, HIGH) #define set_pin(port, pin) digitalWriteFast(pin, HIGH)
#define clear_pin(port, pin) digitalWriteFast(pin, LOW) #define clear_pin(port, pin) digitalWriteFast(pin, LOW)
#define output_pin(ddr, pin) pinMode(pin, OUTPUT) #define output_pin(ddr, pin) pinMode(pin, OUTPUT)
#define pullup_pin(ddr, port, pin) pinMode(pin, INPUT_PULLUP) #define pullup_pin(ddr, port, pin) pinMode(pin, INPUT_PULLUP)
#else #else
#define pulse_pin(port, pin) digitalWrite(pin, LOW); digitalWrite(pin, HIGH) #define pulse_pin(port, pin) digitalWrite(pin, HIGH); digitalWrite(pin, LOW)
#define set_pin(port, pin) digitalWrite(pin, HIGH) #define set_pin(port, pin) digitalWrite(pin, HIGH)
#define clear_pin(port, pin) digitalWrite(pin, LOW) #define clear_pin(port, pin) digitalWrite(pin, LOW)
#define output_pin(ddr, pin) pinMode(pin, OUTPUT) #define output_pin(ddr, pin) pinMode(pin, OUTPUT)